Constant-Coefficient FIR Filters Based on Residue Number System Arithmetic

نویسندگان

  • Negovan Stamenković
  • Vladica Stojanović
  • N. Stamenkovic
  • V. Stojanovic
چکیده

In this paper, the design of a Finite Impulse Response (FIR) filter based on the residue number system (RNS) is presented. We chose to implement it in the (RNS), because the RNS offers high speed and low power dissipation. This architecture is based on the single RNS multiplier-accumulator (MAC) unit. The three moduli set 1 {2 ,2 ,2 1} n n n + − , which avoids 2 1 n + modulus, is used to design FIR filter. A numerical example illustrates the principles of residue encoding, residue arithmetic, and residue decoding for FIR filters.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Optimization of Rns Fir Filters for 6-inputs Lut Based Fpgas

In this paper optimized Residue Number System (RNS) arithmetic blocks to better exploit some of the architectural characteristics of the last generation FPGAs are presented. The implementation of modulo m adders, constant and general multipliers, input and output converters is presented. These architectures are based on moduli sets chosen in order to optimally use the six inputs Look-Up Tables ...

متن کامل

Optimized Implementation of RNS FIR Filters Based on FPGAs

In this paper optimized Residue Number System (RNS) arithmetic blocks to better exploit some of the architectural characteristics of the last generation FPGAs are presented. The implementation of modulo m adders, modulo m constant and general multipliers, input and output converters are presented. These architectures are based on moduli sets chosen in order to optimally use the 6-input Look-Up ...

متن کامل

RNS implementation of FIR filters based on distributed arithmetic using field-programmable logic

Field-programmable logic (FPL) densities and performance have steadily improved, allowing DSP solutions to be integrated on a single FPL chip. The primary limitation of FPLs, in DSP-centric applications, is their intrinsically weak arithmetic performance compared to DSP microprocessors and ASICs. In some cases, distributed arithmetic (DA) has been used to mask FPL arithmetic inadequacies. The R...

متن کامل

Digital FIR Filter Architecture Based on the Residue Number System

In this paper, architecture of residue number system used in FIR filters, is presented. For many years residue number coding has been recognized as a system which provides capability for implementation of a high speed addition and multiplication. These advantages of residue number system coding for the high speed FIR filters design results from the fact that an digital FIR filter requires only ...

متن کامل

Design and Analysis of RNS Based FIR Filter Using Verilog Language

Digital filter plays an important role in Very Large Scale Integration (VLSI) technology. The existing Finite Impulse Response (FIR) filter has long transient response which is the major limitation. To overcome this drawback, Residue Number System (RNS) based FIR filters is developed which is described in this paper. High-speed is obtained by introducing the residue arithmetic concept that perm...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2012